Introduction

Solid state relays, invented by Crydom engineers in 1972, have been around for more than 30 years. Time has brought improvements in control systems, current and voltage capability, and other features, but the basic element of a solid state relay remains the output switch – sometimes a triac but more often (and more reliably) back-to-back SCRs. This output switch is the key part of a solid state relay, the component that does the work.

The purchaser of a solid state relay is buying, essentially, silicon. Simplistic though it may sound, the output switch silicon is the key to all major performance features of a solid state relay. This note will describe the various methods of controlling solid state relays, the options available, and application considerations; in addition, it will examine the trade offs, options, strengths and weaknesses of output silicon devices and how they are thermally managed.

Principle of Operation

AC output solid state relays are normally powered by the AC line itself, by connecting the two gates of the output SCRs through a controlled switch. (Fig 1.) When S1 is closed, the gates of SCR1 and SCR2 are connected, and current from the AC supply flows through either R1 or R2 into the gate of whichever SCR is forward biased; this turns the SCR on and the relay conducts. While S1 is closed this action continues, reversing each half cycle of the AC supply and SCR1 and 2 conduct alternately. When S1 is opened, whichever SCR is conducting continues to conduct until the next zero current point. When the SCR turns off, the other SCR now has no gate current so the relay opens.

Either of two generally used circuits can provide the S1 function, both of which offer excellent optical isolation between control and output of the solid state relay.

One circuit (Fig 2) uses an opto-triac as the isolating element, and the other (Fig 3) uses an opto-transistor as the isolating element. Each approach has is own advantages and disadvantages.

The opto-transistor circuit (Fig 3) requires less control current to operate, conserving power, space and money in installations that use many relays. Another advantage of the optotransistor approach is the flexibility available to the user to modify the control circuit characteristics in terms of zero cross voltage window, noise suppression, etc. The disadvantage of this approach is that it is more expensive.

The opto-triac circuit generally requires a higher control current for satisfactory operation, especially with inductive loads. Moreover, the control circuit characteristics are not accessible to the relay manufacturer so they are inflexible. With fewer components, this type of circuit isusually less expensive unless highly specialized opto-triacs are used. In this case, the relay becomes very expensive.

Solid state relays can be supplied with either a zero voltage turn-on feature or an instantaneous turn–on, depending on what is most appropriate for the application. Additionally, with a modified version of the opto-transistor circuit of Fig 3, a normally closed solid state relay can be designed.

Solid state relays can be either AC or DC voltage controlled. For AC control the AC signal is rectified and filtered to provide DC to the opto-transistor or opto-triac LED. Obviously the AC control versions can also be DC controlled by using just one half of the rectifier.

Application Considerations

Different applications require different solid state relay characteristics. In their simplest form, the two turn-on methods– zero cross or instantaneous– have specific application areas. However, there are few absolute rules governing when either should be used.

If the load requires proportional control every half cycle (such as incandescent lamp dimming or low thermal mass temperature control), the instantaneous turn-on type must be used. For high thermal mass loads, a zero cross relay with complete cycles of conduction and non-conduction is usually the preferred method of temperature control.

For inductive loads it has generally been suggested that a zero cross relay is used. However, for these types of loads a random turn on type should always be considered. Under certain low load current and low power factor conditions it is possible for zero cross relay to conduct only on every other half cycle (half waving). This is caused by the relay terminal voltage rising so rapidly through the zero cross voltage window (at the lagging current zero) that the relay control circuit does not have time to react and so is locked off until the next voltage zero. With a random turn on type there is no zero cross window so no danger of the relay half waving. If there is any doubt or question it is safer to use a random turn on relay for inductive loads.

Key Elements of Solid State Relays

As discussed earlier, a number of methods may be used to control the output of a solid state relay. But, the key phrase is “the output of a solid state relay.”

In most cases, Crydom uses back-toback SCRs as the output elements of its AC output solid state relays. Backto- back SCR configuration has performance advantages when compared with triac outputs, notably dv/dt. Triacs have a severe dv/dt limitation when they are turning off: the commutating dv/dt of a triac is normally in the 5 to 10 V/microsecond range. Back-to-back SCRs do not have this limitation, having no commutating dv/dt, just critical dv/dt greater than 500V/microsecond. Using two output elements (back-to-back SCR) offers thermal benefits compared with a single element (triac) as the heat dissipated is spread over a wider area of the ceramic insulator.

Although the aluminum oxide ceramic substrate used to isolate the solid state relay from the base plate is a good compromise as a thermal conductor, it has its limitations. The ceramic substrate does not efficiently conduct heat laterally, so by separating the heat source into two elements, more of the substrate is used to conduct the heat vertically through the ceramic. Additionally, the two SCRs are attached to their own substantial copper leadframes, which further help to spread the heat over a larger area of the ceramic substrate. Even with the extensive use of copper leadframes to spread the heat, the ceramic substrate is the dominant source of thermal impedance, contributing approximately 50% to the total thermal impedance of the relay, from SCR chip to relay baseplate.
The back-to-back SCR approach is preferred if the relay is subjected to surge currents, because each element is isolated from its partner both thermally and electrically, unlike in a single element triac output.
Even the use of SCRs as the output element of a solid state relay is not a straightforward decision. Economics is a strong consideration when the manufacturer is deciding what size and type of SCR to use because, as stated earlier, the purchaser of a solid state relay is buying silicon. The control circuit determines turn-on and turn-off characteristics, but it is the output silicon switch that is the key to performance. Obviously, the smaller the SCR chip, the lower the cost, but this also results in lower performance – surge (or overload) current is reduced, power dissipation and thermal impedance are increased. Of these, perhaps reducing the thickness of the silicon can marginally increase surge current, the forward voltage drop and, therefore, power dissipation will also be reduced. However, using thinner silicon is not an easy solution: The SCR chip manufacturer will experience yield penalties owing to increased wafer breakage and lower blocking voltage yield, resulting in higher manufacturing c ost. The blocking voltage of the thinner SCR chips will probably be lower, making the final solid state relay significantly more susceptible to transient overvoltage damage. This is especially true if the thickness is reduced to the point where the SCR breakover is not an avalanche breakover but punchthrough breakdown. If the silicon is susceptible to punch-through break down, any overvoltage will destroy the SCR chip, whereas in an avalanche breakdown the SCR will normally self fire, conduct for the remainder of the half cycle and then return to its normal blocking condition, undamaged.
If thinner silicon has disadvantages, then consider thicker silicon chips, which will generally be more rugged relative to overvoltage transients and have a higher blocking voltage rating. The forward voltage drop will be higher, resulting in higher power dissipation and lower surge current capability. For the silicon chip manufacturer, the overall yield will be higher due to less wafer breakage and higher useful voltage yield, resulting in lower manufacturing cost.
Unfortunately, most solid state relay manufacturers depend on SCR chip manufacturers who design chips to suit their own internal needs. The use of SCR chips for solid state relays is a relatively small percentage of the over all use of a manufacturer’s SCR chip output. Therefore, it is difficult if not impossible for solid state relay manufacturers to optimize their chip sizes, chip thickness and chip voltage rating. They have to figure out the best way to use whatever is available on the open market.
Because of this un acceptable limitationon the most important element of its solid state relays, Crydom has invested in its own independent wafer fabrication operation. As a result, Crydom can now tailor its SCR chips to obtain exactly the performance it needs to cover the entire spectrum of solid state relay applications. If the need is for thinner, low voltage, low power dissipation, high surge current chips, Crydom’s highly experienced power semiconductor design engineers can easily provide a matrix of samples to identify the most suitable chip design (thickness, active area, blocking voltage, overall yield, etc.) for a given application. Or, if higher voltage and overvoltage tolerant chips are needed, then a different matrix can be evaluated for these applications.

These are just the basic characteristics. To optimize a design involves other considerations such as gate current to fire, gate voltage to fire, holding current, latching current and dv/dt capability. All of these parameters are taken into account when the chip designs are established, as part of the overall review by wafer fabrication/SCR design engineers, applications engineers and solid state relay process engineers. The result is a family of SCR chips that are specifically designed for use in solid state relays which satisfy all of the requirements of the manufacturer and the relay user.

No other manufacturer has this unique combination of engineering and manufacturing talent dedicated to optimizing their power solid state relays at the most important level – the output silicon.